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Reliability issues in Full Custom Design (45nm)

Posted by Durga Sreepathy on Tuesday, December 23, 2008,


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Capacitance Issues in Analog Layout Design (45nm)

Posted by Durga Sreepathy on Tuesday, December 23, 2008,
Capacitor layout, like resistor layout, is much simpler than transistor layout. The main difficulty is finding the appropriate capacitor for a given application. Capacitors can be generated in several different ways, including: poly-silicon to well, metal to metal, and in some processes, poly to poly and/or MIM capacitors. Again, the main concerns for passive device layout are parasitics minimization and device matching.
  • Capacitor parasitics are dependant on the type of capacitor used and the ...

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Resistor Issues in Analog Layout Design (45nm)

Posted by Durga Sreepathy on Tuesday, December 23, 2008,
Analog layout can be broken down into three phases: device generation, device placement and routing. In the device generation phase, three types of devices are necessary: MOSFET’s, resistors, and capacitors.
  • Unlike most digital circuit designers, analog circuit designers must rely heavily on the performance of passive devices. As with MOSFET devices, the layout of passive devices can greatly affect the performance of the overall circuit.Minimization of device parasitics and device matching a...

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Physical Design Engineer


•Experience in ASIC - Cell Based Place & Route for Block Level Design. Involved in Floorplan, Power Plan, Placement, Routing flows for Semi Custom Physical design.

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